S 8211D Series BATTERY PROTECTION IC

Transcript

1 S-8211D Series BATTERY PROTECTION IC www.ablic.com FOR 1-CELL PACK www.ablicinc.com _03 © ABLIC Inc., 2005-2015 Rev.6.5 The S-8211D Series is a protection IC for 1-cell lithium-ion / lithium-polymer rechargeable battery and includes high-accuracy voltage detection circuits and delay circuits. The S-8211D Series is suitable for protecting 1-cell rechargeabl e lithium-ion / lithium-polymer battery packs from overcharge, overdischarge, and overcurrent. Features  High-accuracy voltage detection circuit  Accuracy  25 mV (Ta = Overcharge detection volt age 3.6 V to 4.5 V (5 mV step)  C) 25  Accuracy  30 mV (Ta = 5  C to  55  C)  *1  50 mV Accuracy Overcharge release voltage 3.5 V to 4.4 V V to 3.0 V (10 mV step) Overdischarge detection voltage 50 mV Accuracy 2.0  *2  100 mV Accuracy 2.0 V to 3.4 V Overdischarge release voltage 05 V to 0.30 V (10 mV step) Accuracy  Discharge overcurrent detection voltage 0. 15 mV 0.5 V (fixed)  200 mV Load short-circuiting detection voltage Accuracy Detection delay times are generated only by an inte  rnal circuit (external capacitors are unnecessary). Accuracy  20% High-withstand voltage (VM pin and CO pin: Absolute maximum rating = 28 V)   0 V battery charge function "available" / "unavailable" is selectable. Power-down function "available" / "unavailable" is selectable.   Wide operation temperature range Ta =    85 40 C C to  Low current consumption  3.0 During operation  A max. (Ta =  25  C)  A typ., 5.5  A max. (Ta =  25  C) 0.2 During power-down *3 Lead-free, Sn 100%, halogen-free  Overcharge release voltage = Overcharge detection voltage Overcharge hysteresis voltage *1.  or from a range of 0.1 V to 0.4 V in 50 mV step.) (Overcharge hysteresis voltage can be selected as 0 V *2. Overdischarge release voltage  Overdischarge hysteresis voltage = Overdischarge detection voltage (Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.) Refer to "  Product Name Structure " for details. *3.  Applications Lithium-ion rechargeable battery pack  Lithium-polymer rechargeable battery pack   Packages  SOT-23-5  SNT-6A 1

2 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Block Diagram Output control circuit 0 V battery charge / Oscillator control Divider control charge inhibition circuit DO circuit circuit VDD  Charger detection circuit CO   Overcharge detection  comparator Discharge overcurrent detection comparator R VMD VM  R VMS  Overdischarge  detection comparator  Load short-circuiting detection VSS comparator Remark All diodes shown in figure are parasitic diodes. Figure 1 2

3 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Product Name Structure 1. Product name 1. 1 SOT-23-5 S-8211D xx - M5T1 x Environmental code U: Lead-free (Sn 100%), halogen-free S: Lead-free, halogen-free G: Lead-free (for details, please contact our sales office) *1 Package name (abbreviation) and IC packing specifications M5T1: SOT-23-5, Tape *2 Serial code Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. ". 3. Product name list Refer to " 1. 2 SNT-6A S-8211D xx - I6T1 U Environmental code U: Lead-free (Sn 100%), halogen-free *1 Package name (abbreviation) and IC packing specifications I6T1: SNT-6A, Tape *2 Serial code Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to " 3. Product name list ". 3

4 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 2. Packages Table 1 Package Drawing Codes Reel Land Package Name Dimension Tape  SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD SD PG006-A-R-SD PG006-A-L-SD SNT-6A PG006-A-P-SD PG006-A-C- 3. Product name list 3. 1 SOT-23-5 Table 2 Discharge Over- Over- Over- Over- charge discharge charge discharge Overcurrent 0 V Battery Delay Time Power-down Detection Detection Release Release Detection Product Name Charge *1 Combination Function Voltage Voltage Voltage Voltage Voltage Function [V [V [V [V ] ] ] ] [V ] DU CL CU DL DIOV 0.19 V 2.50 V 2. 80 V 4.180 V Unavailable (1) Available S-8211DAD-M5T1x 4.280 V 4.180 V 2.50 V 2.70 V 0.19 V Unavailable (1) Available S-8211DAE-M5T1x 4.280 V 4.275 V 2.30 V 2. 40 V 0.10 V Available (1) Available S-8211DAH-M5T1x 4.175 V 4.075 V 2.50 V 2.90 V 0.15 V Unavailable (1) Available S-8211DAI-M5T1x 4.325 V S-8211DAJ-M5T1x 4.280 V 3.00 V 3. 00 V 0.08 V Available (1) Available 4.080 V 4.080 V 2.30 V 2.30 V 0.13 V Unavailable (1) Available S-8211DAK-M5T1x 4.280 V (1) 4.280 V S-8211DAL-M5T1x Available 4.080 V 2.80 V 2. 80 V 0.10 V Available S-8211DAM-M5T1x 4.275 V 2. 90 V 0.15 V Unavailable (1) Available 4.075 V 2.50 V 3.600 V 2.00 V 2. 30 V 0.15 V Available (1) Available S-8211DAR-M5T1x 3.600 V 3.600 V 3.500 V 2.50 V 2. 80 V 0.10 V Available (1) Available S-8211DAS-M5T1x 3.650 V 2.50 V 2. 80 V 0.15 V Available (1) Available 3.550 V S-8211DAU-M5T1y 3.700 V 3.600 V 2.50 V 2. 80 V 0.05 V Available (1) Available S-8211DAV-M5T1y (1) 3.800 V 3.700 V 2.50 V 2. 80 V 0.10 V Available Available S-8211DAW-M5T1y S-8211DBB-M5T1U 4.350 V 2.10 V 2.20 V 0.26 V Unavailable (1) Available 4.150 V Available 4.350 V 2.10 V 2. 20 V S-8211DBD-M5T1U Unavailable (1) 4.150 V 0.11 V S-8211DBE-M5T1U 4.350 V 4.150 V 2.10 V 2.20 V 0.14 V Unavailable (1) Available S-8211DBF-M5T1U 4.230 V 4.080 V 3.00 V 3. 10 V 0.15 V Unavailable (1) Available S-8211DBG-M5T1U 4.050 V 2.70 V 3. 00 V 0.20 V Unavailable (1) Available 4.250 V *1. Refer to Table 4 about the details of the delay time combinations (1). Please contact our sales office for the products with de tection voltage value other th an those specified above. Remark 1. 2. x: G or U y: S or U 3. Please select products of environmental code = U for Sn 100%, halogen-free products. 4

5 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. 2 SNT-6A Table 3 Discharge Over- Over- Over- Over- Overcurrent charge discharge discharge charge 0 V Battery Delay Time Power-down Detection Detection Release Detection Release Charge Product Name *1 Combination Function Voltage Voltage Voltage Voltage Function Voltage [V [V [V [V ] ] ] ] CL DL DU CU ] [V DIOV 4.280 V 4.180 V 2.50 V 2. 80 V 0.19 V Unavailable (1) Available S-8211DAD-I6T1U 4.280 V 4.180 V 2.50 V 2.70 V 0.19 V Unavailable (1) Available S-8211DAE-I6T1U Unavailable 4.250 V 4.050 V 2. 40 V 2.90 V 0.10 V Available (2) S-8211DAF-I6T1U Unavailable S-8211DAG-I6T1U 2. 30 V 2.30 V 0.08 V Available (1) 4.280 V 4.080 V 4.325 V V 0.15 V Unavailable 2.50 V 2.90 4.075 V (1) Available S-8211DAI-I6T1U 4.280 V 4.080 V 2.30 V 3.00 V 0.10 V Unavailable S-8211DAN-I6T1U (3) Available 4.280 V 4.080 V 2.30 V 2.30 V 0.10 V Unavailable (3) Available S-8211DAQ-I6T1U 4.280 V 2.70 V 2.70 V 0.08 V Unavailable 4.080 V (3) Available S-8211DAT-I6T1U 4.080 V 2.00 V 2.00 V 0.11 V Unavailable 4.280 V S-8211DAX-I6T1U (3) Available Available 3.900 V 3.900 V 2.00 V 2. 30 V 0.15 V S-8211DAY-I6T1U (1) Available Available 3.800 V 3.500 V 2.40 V 2. 70 V 0.07 V S-8211DAZ-I6T1U (1) Available Available S-8211DBA-I6T1U 4.000 V 0.10 V 900 V (1) Available 3. 2.35 V 2.65 V Unavailable 3.00 V 150 V 0.20 V (1) Available S-8211DBC-I6T1U 4.250 V 3.10 V 4. about the details of the delay ti me combinations (1) to (3). Table 4 *1. Refer to tection voltage value other th Please contact our sales office for the products with de an those specified above. Remark Table 4 Overcharge Detection Discharge Overcurrent Overdischarge Detection Load Short-circuiting Delay Time Delay Time Detection Delay Time Delay Time Detection Delay Time Combination [t ] [t [t ] ] ] [t CU DL SHORT DIOV 1.2 s 150 ms 9 ms 300  s (1) 300 1.2 s 75 ms 9 ms  (2) s (3) 1.2 s 300  s 150 ms 18 ms The delay times can be changed within the range listed . For details, please contact our sales office. Remark Table 5 Table 5 Symbol Selection Range Remark Delay Time *1 1.2 s 143 ms 573 ms t Overcharge detection delay time Select a value from the left. CU *1 150 ms Select a value from the left. 38 ms Overdischarge detection delay time t 300 ms DL *1 9 ms Discharge overcurrent detection delay time 4.5 ms t 18 ms Select a value from the left. DIOV *1 300  s  Load short-circuiting detection delay time t Select a value from the left. 560  s SHORT The value is the delay time of the standard products. *1. 5

6 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Pin Configurations 1. SOT-23-5 Table 6 Description Symbol Pin No. Top view Voltage detection pin between VM pin and VSS pin 1 VM (Overcurrent / charger detection pin) 5 4 Input pin for positive power supply VDD 2 3 VSS Input pin for negative power supply Connection pin of discharge control FET gate 4 DO (CMOS output) 13 2 Connection pin of charge control FET gate 5 CO (CMOS output) Figure 2 2. SNT-6A Table 7 Pin No. Description Symbol Top view *1 NC 1 No connection 1 6 Connection pin of charge control FET gate 2 CO 5 2 (CMOS output) 4 3 Connection pin of discharge control FET gate 3 DO (CMOS output) 4 VSS Input pin for negative power supply Figure 3 5 VDD Input pin for positive power supply Voltage detection pin between VM pin and VSS pin 6 VM (Overcurrent / charger detection pin) *1. The NC pin is electrically open. to the VDD pin or the VSS pin. The NC pin can be connected 6

7 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series Absolute Maximum Ratings  Table 8 (Ta =  25  C unless otherwise specified) Applied Pin Abso lute Maximum Rating Unit Item Symbol Input voltage between VDD pin and V V VDD V 12  0.3 to V  SS SS DS VSS pin V VM pin input voltage V 0.3 VM V   28 to V DD DD VM 0.3 to V V DO V V DO pin output voltage  0.3  DD DO SS V CO pin output voltage V 0.3 CO V   0.3 to V DD CO VM 250 (When not mounted on board) mW  SOT-23-5 *1 600 Power dissipation P  mW D *1 400 SNT-6A  mW Operation ambient temperature T C   40 to  85  opr 55 to T C   Storage temperature  125  stg *1. When mounted on board [Mounted board] t1.6 mm (1) Board size: 114.3 mm   76.2 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 700 600 SOT-23-5 ) [mW] D 500 SNT-6A 400 300 200 100 Power Dissipation (P 0 150 100 50 0 C] Ambient Temperature (Ta) [  Figure 4 Power Dissipation of Package (When Mounted on Board) 7

8 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Electrical Characteristics C) 1. Except detection delay time (Ta = 25   Table 9  25 C unless otherwise specified) (Ta =  Test Test Condi- Typ. Max. Unit Item Symbol Condition Min. Circuit tion DETECTION VOLTAGE  V  V CU CU V V 1 1 3.60 V to 4.50 V, adjustable CU 0.025 0.025 Overcharge detection voltage V CU  V  3.60 V to 4.50 V, adjustable, V CU CU V V 1 1 CU *1 Ta =  5  C to  55  0.03 C 0.03 V V   CL CL V V V 1 1  V CL CL CU 0.05 0.05 3.50 V to 4.40 V, Overcharge release voltage V CL adjustable V V   CL CL V V 1 1 = V V CL CU CL 0.05 0.025 V V   DL DL V V 2 2 2.00 V to 3.00 V, adjustable V Overdischarge detection voltage DL DL 0.05 0.05 V V   DU DU V V V 2 2  V DU DU DL 0.10 0.10 2.00 V to 3.40 V, V Overdischarge release voltage DU Adjustable V V   DU DU V V 2 2 = V V DU DL DU 0.05 0.05 V V   DIOV DIOV V 3 2 V V 0.05 V to 0.30 V, adjustable Discharge overcurrent detection voltage DIOV DIOV 0.015 0.015 *2 Load short-circuiting detection voltage 0.30  V 0.50 0.70 V 3 2 SHORT Charger detection voltage V   1.0  0.7  0.4 V 4 2 CHA 0 V BATTERY CHARGE FUNCTION V 1.2   V 10 2 0 V battery charge starting charger voltage 0 V battery charge function "available" 0CHA V 0.5 V 11 2 0 V battery charge function "unavailable"  0 V battery charge inhibition battery voltage  0INH INTERNAL RESISTANCE R 5 3 V = 1.8 V, V Resistance between VM pin and VDD pin  = 0 V 100 300 900 k VM VMD DD Resistance between VM pin and VSS pin R 5 3 V  = 3.5 V, V k = 1.0 V 10 20 40 VM DD VMS INPUT VOLTAGE V  Operation voltage between VDD pin and VSS pin  8 V   1.5 DSOP1 Operation voltage between VDD pin and VM pin V  1.5  28 V   DSOP2 INPUT CURRENT (WITH POWER-DOWN FUNTION) Current consumption during operation I  V 5.5 A 4 2 3.0 = 0 V 1.0 = 3.5 V, V VM DD OPE V A 4 2 Current consumption during power-down I  0.2  = V = 1.5 V  VM DD PDN INPUT CURRENT (WITHOUT POWER-DOWN FUNTION) 3.0 V = 3.5 V, V Current consumption during operation I = 0 V A 4 2  5.5 1.0 DD OPE VM I A 4 2 V  = V 0.3 = 1.5 V Current consumption during overdischarge 2.0 3.5 VM OPED DD OUTPUT RESISTANCE R 6 4 V  CO pin resistance "H" 5 10 k = 3.5 V, V 2.5 = 0 V = 3.0 V, V VM DD CO COH  6 4 CO pin resistance "L" R 5 10 k V 2.5 = 0.5 V, V = 0 V = 4.5 V, V VM COL DD CO 7 4 DO pin resistance "H" R  V 5 10 k = 3.0 V, V 2.5 = 3.5 V, V = 0 V VM DO DOH DD  DO pin resistance "L" R V k = 0.5 V, V = V = 1.8 V 2.5 5 10 7 4 DD DOL VM DO *1. Since products are not screened at high and low temperature, the specification fo r this temperature range is guaranteed by design, not tested in production. *2. ) is higher than discharge ov ercurrent detection voltage In any conditions, load short-circuiting detection voltage (V SHORT (V ). DIOV 8

9 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series *1  )  85°C 2. Except detection delay time (Ta = 40°C to Table 10 *1 85°C  40°C to (Ta =  unless otherwise specified) Test Test Typ. Max. Unit Item Symbol Condition Min. Condi- Circuit tion DETECTION VOLTAGE V V   CU CU V 1 1 V V 3.60 V to 4.50 V, adjustable Overcharge detection voltage CU CU 0.060 0.040 V V   CL CL V V 1 1 V V  CU CL CL 0.08 0.065 3.50 V to 4.40 V, V Overcharge release voltage CL adjustable V V   CL CL V V 1 1 = V V CL CU CL 0.04 0.08 V V   DL DL V V 2 2 V 2.00 V to 3.00 V, adjustable Overdischarge detection voltage DL DL 0.13 0.11 V V   DU DU V 2 2 V V  V DU DU DL 0.15 0.19 2.00 V to 3.40 V, V Overdischarge release voltage DU adjustable V V   DU DU V V 2 2 V = V DU DU DL 0.13 0.11 V V Discharge overcurrent detection   DIOV DIOV V V V 3 2 0.05 V to 0.30 V, adjustable DIOV DIOV 0.021 voltage 0.024 *2 Load short-circuiting detection voltage 0.50 0.84 V 3 2 0.16  V SHORT 2 0.2 V 4 Charger detection voltage V    1.2  0.7 CHA 0 V BATTERY CHARGE FUNCTION 0 V battery charge starting charger voltage 0 V battery charge function "available" 1.7 V  V 10 2  0CHA V 0.3 V 11 2 0 V battery charge function "unavailable"  0 V battery charge inhibition battery voltage  0INH INTERNAL RESISTANCE R 5 3 V = 1.8 V, V Resistance between VM pin and VDD pin  = 0 V 78 300 1310 k VM VMD DD Resistance between VM pin and VSS pin R 5 3 V  = 3.5 V, V k = 1.0 V 7.2 20 44 VM DD VMS INPUT VOLTAGE een VDD pin and VSS pin V Operation voltage betw 1.5  8 V    DSOP1 Operation voltage between VDD pin and VM pin V  1.5  28 V   DSOP2 INPUT CURRENT (WITH POWER-DOWN FUNTION) Current consumption during operation I  V 6.0 A 4 2 3.0 = 0 V 0.7 = 3.5 V, V VM DD OPE A 4 2 0.3 Current consumption during power-down I  V  = V = 1.5 V  VM DD PDN INPUT CURRENT (WITHOUT POWER-DOWN FUNTION) 3.0 V = 3.5 V, V A 4 2 Current consumption during operation I 0.7  6.0 = 0 V DD VM OPE I A 4 2 V  = V 3.8 = 1.5 V 0.2 Current consumption during overdischarge 2.0 VM OPED DD OUTPUT RESISTANCE R 6 4 V  CO pin resistance "H" 5 15 k = 3.5 V, V 1.2 = 0 V = 3.0 V, V VM DD CO COH 6 4 V CO pin resistance "L" R 5 15 k  1.2 = 0.5 V, V = 0 V = 4.5 V, V VM COL DD CO 7 4 DO pin resistance "H" R  V 5 15 k = 3.0 V, V 1.2 = 3.5 V, V = 0 V VM DO DOH DD  DO pin resistance "L" R V k = 0.5 V, V = V = 1.8 V 1.2 5 15 7 4 DD DOL VM DO *1. Since products are not screened at high and low temperature, the specification fo r this temperature range is guaranteed by design, not tested in production. *2. ercurrent detection voltage ) is higher than discharge ov In any conditions, load short-circuiting detection voltage (V SHORT (V ). DIOV 9

10 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. Detection delay time 3. 1 S-8211DAD, S-8211DAE, S-8211DAG, S-8211DAH, S-8211DAI, S-8211DAJ, S-8211DAK, S-8211DAL, S-8211DAM, S-8211DAR, S-8211DAS, S-8211DAU, S-8211DAV, S-8211DAW, S-8211DAY, S-8211DAZ, S-8211DBA, S-8211DBB, S-8211DBC, S-8211DBD, S-8211DBE, S-8211DBF, S-8211DBG Table 11 Test Test Condi- Typ. Max. Unit Item Symbol Condition Min. Circuit tion  25°C) DELAY TIME (Ta = t  0.96 1.2 1.4 s 8 5 CU Overcharge detection delay time t 150 180 ms 8 5  120 DL Overdischarge detection delay time t  7.2 9 11 ms 9 5 DIOV Discharge overcurrent detection delay time t  s 9 5  240 300 360 SHORT Load short-circuiting detection delay time *1  40°C to  85°C) DELAY TIME (Ta = t  0.7 1.2 2.0 s 8 5 CU Overcharge detection delay time t  83 150 255 ms 8 5 DL Overdischarge detection delay time t  ms 9 5 DIOV Discharge overcurrent detection delay time 5 9 15 t   150 300 540 s 9 5 SHORT Load short-circuiting detection delay time *1. Since products are not screened at high and low temperatur e, the specification for this temperature range is guaranteed by design, not tested in production. 3. 2 S-8211DAF Table 12 Test Test Condi- Condition Min. Typ. Max. Unit Item Symbol Circuit tion DELAY TIME (Ta = 25°C)  s 8 5  Overcharge detection delay time t 0.96 1.2 1.4 CU t  ms 8 5 DL Overdischarge detection delay time 61 75 90 t  ms 9 5 DIOV Discharge overcurrent detection delay time 7.2 9 11 t  s 9 5  SHORT Load short-circuiting detection delay time 240 300 360 *1   85°C) DELAY TIME (Ta = 40°C to s 8 5 Overcharge detection delay time  t 0.7 1.2 2.0 CU t ms 8 5  DL Overdischarge detection delay time 41 75 128 t ms 9 5  DIOV Discharge overcurrent detection delay time 5 9 15 t  s 9 5  SHORT Load short-circuiting detection delay time 300 540 150 *1. Since products are not screened at high and low temperat ure, the specification for this temperature range is guaranteed by design, not tested in production. 10

11 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. 3 S-8211DAN, S-8211DAQ, S-8211DAT, S-8211DAX Table 13 Test Test Item Symbol Condition Min. Typ. Max. Unit Condi- Circuit tion DELAY TIME (Ta =  25°C) t  0.96 1.2 1.4 s 8 5 CU Overcharge detection delay time t 120  150 180 ms 8 5 DL Overdischarge detection delay time t  14.5 18 22 ms 9 5 DIOV Discharge overcurrent detection delay time t s 9 5 300 360  240  SHORT Load short-circuiting detection delay time *1  40°C to  85°C) DELAY TIME (Ta = t  0.7 1.2 2.0 s 8 5 CU Overcharge detection delay time t 83 150 255 ms 8 5  DL Overdischarge detection delay time t ms 9 5  DIOV Discharge overcurrent detection delay time 10 18 30 t s 9 5 300 540   150 SHORT Load short-circuiting detection delay time *1. Since products are not screened at high and low temperat ure, the specification for this temperature range is guaranteed by design, not tested in production. 11

12 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Test Circuits ) and the DO pin Caution Unless otherwise specified, the output voltage levels "H" and "L" at the CO pin (V CO (V the N-channel FET. Judge the CO pin level with ) are judged by the threshold voltage (1.0 V) of DO respect to V and the DO pin level with respect to V . SS VM 1. Overcharge detection voltage, overcharge release voltage (Test condition 1, test circuit 1) goes ) is defined as the voltage between the VDD pin and the VSS pin at which V Overcharge detection voltage (V CU CO from "H" to "L" when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge release voltage (V goes from "L" to ) is defined as the volta ge between the VDD pin and the VSS pin at which V CO CL decreased. Overcharge hysteresis voltage (V "H" when the voltage V1 is then gradually ) is defined as the difference HC between overcharge detection voltage (V ) and overcharge release voltage (V ). CU CL 2. Overdischarge detection voltage, overdischarge release voltage (Test condition 2, test circuit 2) Overdischarge detection voltage (V ) is defined as the voltage between t he VDD pin and the VSS pin at which V DO DL goes from "H" to "L" when the voltage V1 is gradually decreas ed from the starting condition of V1 = 3.5 V, V2 = 0 V. Overdischarge release voltage (V ) is defined as the voltage between t he VDD pin and the VSS pin at which V DO DU goes from "L" to "H" when the voltage V1 is then gra dually increased. Overdischarge hysteresis voltage (V ) is HD defined as the difference between overdischarge release voltage (V ). ) and overdischarge detection voltage (V DU DL 3. Discharge overcurrent detection voltage (Test condition 3, test circuit 2) Discharge overcurrent detection voltage (V ) is defined as the voltage between the VM pin and the VSS pin whose DIOV delay time for changing V from "H" to "L" lies between the minimum and the maximum value of discharge DO overcurrent delay time when the voltage V2 is increased rapidly (within 10  s) from the starting condition of V1 = 3.5 V, V2 = 0 V. 4. Load short-circuiting detection voltage (Test condition 3, test circuit 2) Load short-circuiting detection voltage (V ) is defined as the voltage between the VM pin and the VSS pin whose SHORT delay time for changing V from "H" to "L" lies between the minimum and the maximum value of load short-circuiting DO delay time when the voltage V2 is increased rapidly (within 10  s) from the starting condition of V1 = 3.5 V, V2 = 0 V. 5. Current consumption during operation (Test condition 4, test circuit 2) ) under the set ) is the current that flows through the VDD pin (I The current consumption during operation (I OPE DD conditions of V1 = 3.5 V and V2 = 0 V (normal status). 6. Charger detection voltage (= abnormal charge current detection voltage) (Test condition 4, test circuit 2) and the VSS pin; when gradually increasing The charger detection voltage (V ) is the voltage between the VM pin CHA V1 at V1 = 1.8 V, V2 = 0 V to set V1 = V goes "L"  (V /2), after that, decreasing V2 gradually from 0 V so that V HD DO DL to "H". Measurement of the charger detection voltage is available for the product with overdischarge hysteresis V 0 only.  HD The abnormal charge current detection voltage is the voltage between the VM pin and the VSS pin; when gradually decreasing V2 at V1 = 3.5 V, V2 = 0 V and V goes "H" to "L". CO ltage is equal to the charger detection voltage (V The value of the abnormal charge current detection vo ). CHA 12

13 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 7. Current consumption during power-down, current consumption during overdischarge (Test condition 4, test circuit 2) 7. 1 With power-down function The current consumption during power-down (I ) under the set ) is the current that flows through the VDD pin (I DD PDN conditions of V1 = V2 = 1. 5 V (overdischarge status). 7. 2 Without power-down function The current consumption during overdischarge (I ) is the current that flows through the VDD pin (I ) under the set OPED DD conditions of V1 = V2 = 1. 5 V (overdischarge status). 8. Resistance between VM pin and VDD pin (Test condition 5, test circuit 3) ) is the resistance between The resistance between the VM pin and the VDD pin (R the VM pin and the VDD pin VMD V1 = 1.8 V, V2 = 0 V. under the set conditions of 9. Resistance between VM pin and VSS pin (Test condition 5, test circuit 3) The resistance between the VM pin and the VSS pin (R ) is the resistance between the VM pin and the VSS pin VMS under the set conditions of V1 = 3.5 V, V2 = 1.0 V. 10. CO pin resistance "H" (Test condition 6, test circuit 4) The CO pin resistance "H" (R onditions of V1 = 3.5 V, V2 = 0 V, V3 = 3.0 V. ) is the resistance at the CO pin under the set c COH 11. CO pin resistance "L" (Test condition 6, test circuit 4) 4.5 V, V2 = 0 V, V3 = 0.5 V. n under the set conditions of V1 = The CO pin resistance "L" (R ) is the resistance at the CO pi COL 12. DO pin resistance "H" (Test condition 7, test circuit 4) The DO pin resistance "H" (R ) is the resistance at the DO pin under the set c onditions of V1 = 3.5 V, V2 = 0 V, V4 = 3.0 V. DOH 13. DO pin resistance "L" (Test condition 7, test circuit 4) n under the set conditions of V1 = The DO pin resistance "L" (R 1.8 V, V2 = 0 V, V4 = 0.5 V. ) is the resistance at the DO pi DOL 14. Overcharge detection delay time (Test condition 8, test circuit 5) The overcharge detection delay time (t to change from "H" to "L" just after the voltage V1 ) is the time needed for V CO CU momentarily increases (within 10  s) from overcharge detection voltage (V 0.2 V to overcharge detection voltage  ) CU (V )  0.2 V under the set conditions of V2 = 0 V. CU 15. Overdischarge detection delay tme (Test condition 8, test circuit 5) The overdischarge detection delay time (t ) is the time needed for V to change from "H" to "L" just after the voltage DO DL  s) from overdischarge detection voltage (V V1 momentarily decreases (within 10  ) 0.2 V to overdischarge DL detection voltage (V 0.2 V under the set condition of V2 = 0 V. )  DL 13

14 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 16. Discharge overcurrent detection delay time (Test condition 9, test circuit 5) Discharge overcurrent detection delay time (t ) is the time needed for V to go to "L" after the voltage V2 DIOV DO nditions of V1 = 3.5 V, V2 = 0 V. momentarily increases (within 10  s) from 0 V to 0.35 V under the set co 17. Load short-circuiting detection delay time (Test condition 9, test circuit 5) ) is the time needed for V Load short-circuiting detection delay time (t to go to "L" after the voltage V2 SHORT DO onditions of V1 = 3.5 V, V2 = 0 V. momentarily increases (within 10  s) from 0 V to 1.6 V under the set c 18. 0 V battery charge starting charger voltage (0 V battery charge function "available") (Test condition 10, test circuit 2) The 0 V battery charge starting charger voltage (V ween the VDD pin and the VM ) is defined as the voltage bet 0CHA pin at which V goes to "H" (V  0.1 V or higher) when the voltage V2 is gradually decreased from the starting CO VM condition of V1 = V2 = 0 V. 19. 0 V battery charge inhibition battery voltage (0 V battery charge function "unavailable") (Test condition 11, test circuit 2) ) is defined as the voltage between the VDD pin and the VSS The 0 V battery charge inhibition battery voltage (V 0INH pin at which V is gradually increased from the starting goes to "H" (V 0.1 V or higher) when the voltage V1  VM CO  condition of V1 = 0 V, V2 = 4 V. 14

15 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series R1 = I DD 220  VDD A VDD V1 V1 S-8211D Series S-8211D Series VM VSS VM VSS CO DO CO DO V2 V V V V V V V V CO DO DO CO COM COM Figure 5 Test Circuit 1 Figure 6 Test Circuit 2 I DD VDD A VDD V1 V1 S-8211D Series S-8211D Series VM VSS VM VSS DO CO DO CO I A VM I I A A CO DO V2 V2 V4 V3 COM COM Figure 8 Test Circuit 4 Figure 7 Test Circuit 3 VDD V1 S-8211D Series VSS VM DO CO Oscilloscope Oscilloscope V2 COM Figure 9 Test Circuit 5 15

16 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series Operation   Battery Protection IC Connection Example ". Remark Refer to the " 1. Normal status The S-8211D Series monitors the voltage of the battery connected between the VDD pin and the VSS pin and the ontrol charging and discharging. When the battery voltage voltage difference between the VM pin and the VSS pin to c is in the range from overdischarge detection voltage (V ), and the VM pin ) to overcharge detection voltage (V DL CU voltage is not more than the disc harge overcurrent detection voltage (V ), the S-8211D Series turns both the DIOV called the normal status, and in this condition charging charging and discharging control FETs on. This condition is and discharging can be carried out freely. The resistance (R ) between the VM pin and the VDD pin, and the resistance (R ) between the VM pin and the VMS VMD VSS pin are not connected in the normal status. Caution When the battery is connected for the first time, discharging may not be enabled. In this case, short the VM pin and the VSS pin, or set the VM pin’s volt age at the level of the charger detection voltage (V ) or more and the discharge overcurrent detection voltage (V ) or less by connecting the DIOV CHA charger. The S-8211D Series then returns to the normal status. 2. Overcharge status When the battery voltage becomes higher than overcharge detection voltage (V ) during charging in the normal CU status and detection continues for the overcharge detection delay time (t ) or longer, the S-8211D Series turns the CU charging control FET off to stop charging. This condition is called the overcharge status. The resistance (R ) between the VM pin and the VDD pin, and the resistance (R ) between the VM pin and the VMD VMS VSS pin are not connected in the overcharge status. The overcharge status is released in the following two cases ( (1) and (2) ). pin voltage is higher than or equal (1) In the case that the VM to charger detection voltage (V ), and is lower than CHA the discharge overcurrent detection voltage (V ), the S-8211D Series releases t he overcharge status when the DIOV battery voltage falls below the overcharge release voltage (V ). CL (2) In the case that the VM pin volt age is higher than or equal to the di scharge overcurrent detection voltage (V ), DIOV the S-8211D Series releases the overch falls below the overcharge detection arge status when the battery voltage voltage (V ). CU r the overcharge detection, the VM pin voltage rises more When the discharge is started by connecting a load afte than the voltage at the VSS pin due to the V voltage of the parasitic diode. This is because the discharge current f arging control FET. If the VM pin vo ltage is higher than or equal to the flows through the parasitic diode in the ch discharge overcurrent detection voltage (V he overcharge status when the ), the S-8211D Series releases t DIOV battery voltage is lower than or equal to the overcharge detection voltage (V ). CU Caution 1. If the battery is charged to a voltage higher than overcharge detection voltage (V ) and the CU battery voltage does not fall below overcharge detection voltage (V ) even when a heavy load is CU connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below overcharge detection voltage (V ). Since an actual battery CU has an internal impedance of tens of m  , the battery voltage drops immediately after a heavy load that causes overcurr ent is connected, and discharge over current detection and load short- circuiting detection function. 2. When a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below overcharge release voltage (V ). The overcharge status is CL released when the VM pin voltage goes over charger detection voltage (V ) by removing the CHA charger. 16

17 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. Overdischarge status 3. 1 With power-down function ) during discharging in the normal status and When the battery voltage falls below overdischarge detection voltage (V DL erdischarge detection delay time (t the detection continues for the ov ) or longer, the S-8211D Series turns the DL ondition is called the overdi scharge status. Under the discharging control FET off to stop discharging. This c n voltage is pulled up by the resistor bet overdischarge status, the VM pi ween the VM pin and the VDD pin in the S-8211D Series (R ). When voltage difference between the VM pin and the VDD pin then is 1.3 V typ. or lower, the VMD current consumption is reduced to the power-down current consumption (I ). This condition is called the power-down PDN status. The resistance (R connected in the power-down status and the ) between the VM pin and the VSS pin is not VMS overdischarge status. connected and the voltage difference between the VM pin and The power-down status is released when a charger is the VDD pin becomes 1.3 V typ. or higher. When a battery in the overdischarge stat us is connected to a charger and prov ided that the VM pin voltage is lower than charger detection voltage (V ), the S-8211D Series releases t he overdischarge status and turns the CHA discharging FET on when the battery voltage reaches overdischarge detection voltage (V ) or higher. DL When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not lower than charger detection voltage (V discharge status when the battery voltage ), the S-8211D Series releases the over CHA reaches overdischarge release voltage (V ) or higher. DU 3. 2 Without power-down function When the battery voltage falls below overdischarge detection voltage (V ) during discharging in the normal status and DL the detection continues for the ov erdischarge detection delay time (t ) or longer, the S-8211D Series turns the DL discharging control FET off to stop discharging. This c ondition is called the overdischarge status. Under the he VM pin and the VDD pin in the voltage is pulled up by the resistor between t overdischarge status, the VM pin S-8211D Series (R ). VMD The resistance (R overdischarge status. ) between the VM pin and the VSS pin is not connected in the VMS ided that the VM pin voltage is lower us is connected to a charger and prov When a battery in the overdischarge stat than charger detection voltage (V ), the S-8211D Series releases t he overdischarge status and turns the CHA discharging FET on when the battery voltage reaches overdischarge detection voltage (V ) or higher. DL When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not lower than charger detection voltage (V discharge status when the battery voltage ), the S-8211D Series releases the over CHA reaches overdischarge release voltage (V ) or higher. DU 4. Discharge overcurrent status (discharge overcurrent, load short-circuiting) When a battery in the normal status is in the status where the vo ltage of the VM pin is equal to or higher than the discharge overcurrent detection voltage because the discharge current is hi gher than the specified value and the status lasts for the discharge overcurr ent detection delay time, the discharge control FET is turned off and discharging is stopped. This status is called the discharge overcurrent status. he VM pin and the VSS pin are shorted by In the discharge overcurrent status, t the resistor between the VM pin and the VSS pin (R ) in the S-8211D Series. However, the voltage of the VM potential due to the load pin is at the V DD VMS as long as the load is connected. When the load is disconnected completely, the VM pin returns to the V potential. SS ltage of the VM pin returns to disc harge overcurrent detection voltage (V If the S-8211D Series detects that the vo ) DIOV or lower, the discharge overcurrent st atus is restored to the normal status. The S-8211D Series will be restored to the normal status fr om discharge overcurrent dete ction status even when the voltage of the VM pin becomes the disch arge overcurrent detection voltage (V ) or lower by connecting the charger. DIOV The resistance (R ge overcurrent status. connected in the dischar ) between the VM pin and the VDD pin is not VMD 17

18 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 5. Abnormal charge current detection During charging a battery which is in the normal status , if the VM pin voltage becomes lower than the charger detection voltage (V ) and this status is held longer than the overcharge detection delay time (t ), the S-8211D CHA CU Series turns off the charge-control FET to stop c harging. This is abnormal charge current detection. is in "H", and the VM pin voltage becomes lower than the This function works in the case that the DO pin voltage charger detection voltage (V the battery in the overdischarge status, ). Thus if the abnormal charge current flows in CHA control FET to stop charging; the DO pi n voltage goes in "H" so that the the S-8211D Series turns off the charge- he overdischarge detection voltage (V battery voltage becomes higher than t ), and after the overcharge detection DL delay time (t ). cu The status of abnormal charge current detection is released by the lower pot ential difference between the VM pin and the VSS pin than the charger detection voltage (V ). CHA 6. 0 V battery charge function "available" ose voltage is 0 V due to self-discharge. When the 0 V This function is used to recharge a connected battery wh battery charge starting charger voltage (V  pin and EB  pin by ) or a higher voltage is applied between the EB 0CHA connecting a charger, the charging control FET gate is fixed to the VDD pin voltage. When the voltage between the gate and sour ce of the charging control FET becomes equal to or higher than the turn- on voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than overdischarge release voltage (V ), the DU S-8211D Series enters the normal status. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 7. 0 V battery charge function "unavailable" rnally short-circuited (0 V battery) is connected. When the This function inhibits recharging when a battery that is inte battery voltage is the 0 V battery charge inhibition battery voltage (V ) or lower, the charging control FET gate is 0INH fixed to the EB  pin voltage to inhibit charging. When the battery vo ltage is the 0 V battery charge inhibition battery voltage (V ) or higher, charging can be performed. 0INH Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 18

19 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 8. Delay circuit The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter. Remark1. The discharge overcurrent detection delay time (t ) and the load short-circuiting detection delay time DIOV (t ) start when the discharge overcurrent detection voltage (V ) is detected. When the load short- SHORT DIOV circuiting detection voltage (V ) is detected over the load short- circuiting detection delay time (t ) SHORT SHORT overcurrent detection voltage (V after the detection of discharge ), the S-8211D Series turns the DIOV discharging control FET off within t from the time of detecting V . SHORT SHORT V DD DO pin t D t 0  t  SHORT D V SS Load short-circuiting det ection delay time (t ) SHORT Time V DD V SHORT VM pin V DIOV V SS Time Figure 10 2. With power-down function nt continues for longer than the overdischarge When any overcurrent is detected and the overcurre detection delay time (t ) without the load being released, the stat us changes to the power-down status at DL the point where the battery voltage fa lls below overdischarge detection voltage (V ). DL overdischarge detection voltage (V When the battery voltage falls below ) due to overcurrent, the DL S-8211D Series turns the discharging control FET off via overcurrent detection. In this case, if the recovery of the battery voltage is so slow that the battery voltage after the ov erdischarge detection delay time (t ) is DL still lower than the overdischarge detection voltage (V ), the S-8211D Series shifts to the power-down DL status. Without power-down function When any overcurrent is detected and the overcurre nt continues for longer than the overdischarge detection delay time (t ) without the load being released, the stat us changes to the overdischarge status DL at the point where the battery voltage fa lls below overdischarge detection voltage (V ). DL When the battery voltage falls below overdischarge detection voltage (V ) due to overcurrent, the DL overcurrent detection. In this case, if the recovery S-8211D Series turns the discharging control FET off via of the battery voltage is so slow that the battery voltage after the ov erdischarge detection delay time (t ) is DL still lower than the overdi scharge detection voltage (V ), the S-8211D Series shifts to the overdischarge DL status. 19

20 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Timing Chart 1. Overcharge detection, overdischarge detection V CU V V  (V ) CU HC CL Battery voltage V )  V (V HD DU DL V DL V DD DO pin voltage V SS V DD CO pin voltage V SS V EB  V DD M pin voltage V V DIOV V SS V EB  Charger connection Load connection ) Overcharge detection delay time (t CU ) t Overdischarge detection delay time ( DL (1) (2) (3) (1) (1) *1 Status *1. (1): Normal status (2): Overcharge status (3): Overdischarge status Remark The charger is assumed to charge with a constant current. Figure 11 20

21 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 2. Discharge overcurrent detection V CU V V (V )  CL CU HC Battery voltage V (V ) V  HD DU DL V DL V DD DO pin voltage V SS V DD CO pin voltage V SS V DD VM pin voltage V SHORT V DIOV V SS Load connection Load short-circuiting Discharge overcurrent detection dela detection dela y ( time (t time ) y ) t SHORT DIOV (1) (2) (1) (1) (2) *1 Status *1. (1): Normal status (2): Discharge overcurrent status The charger is assumed to charge with a constant current. Remark Figure 12 21

22 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. Charger detection V CU  ) (V V V HC CU CL Battery voltage V  (V V ) HD DU DL V DL V DD DO pin voltage V SS V DD CO pin voltage V SS V DD VM pin voltage V SS V CHA Charger connection In case VM pin voltage < V CHA Load connection Overdischarge is released at the Overdischarge detection ) overdischarge det ection voltage (V DL delay time (t ) DL (1) (2) (1) *1 Status (1): Normal status *1. (2): Overdischarge status Remark The charger is assumed to charge with a constant current. Figure 13 22

23 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 4. Abnormal charge current detection V CU V )  (V V CU HC CL Battery voltage (V ) V  V HD DL DU V DL V DD DO pin voltage V SS V DD CO pin voltage V SS V DD VM pin voltage V SS V CHA Charger connection Load connection Overdischarge detection Abnormal charge current detection delay time ) delay time (t )) ( = overcharge detection delay time (t DL CU (3) (1) (1) (2) (1) *1 Status *1. (1): Normal status (2): Overdischarge status (3): Overcharge status Remark The charger is assumed to charge with a constant current. Figure 14 23

24 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Battery Protection IC Connection Example EB  R1 VDD Battery C1 S-8211D Series VSS CO VM DO R2 FET1 FET2 EB  Figure 15 Table 14 Constants for External Components Symbol Part Purpose Min. Typ. Max. Remark Threshold voltage  Overdischarge detection *1 voltage N-channel    Discharge control FET1 MOS FET Gate to source withstand voltage  Charger *2 voltage Threshold voltage  Overdischarge detection *1 voltage N-channel   Charge control  FET2 MOS FET Gate to source withstand voltage  Charger *2 voltage small as possible to Resistance should be as ESD protection, avoid lowering the overcharge detection 100  220  330  R1 Resistor For power fluctuation *3 accuracy due to current consumption. Connect a capacitor of 0.022  F or higher F 1.0 F 0.1 C1 Capacitor  F For power fluctuation 0.022   *4 between VDD pin and VSS pin. Select as large a resistance as possible to Protection for reverse prevent current when a charger is connected 300  2 k  4 k  R2 Resistor connection of a charger *5 in reverse. *1. If the threshold voltage of a FET is low, the FET may not cut the charge current. If a FET with a threshold voltage equal to or higher than the overdischarge detecti on voltage is used, discharging may be st opped before overdischarge is detected. If the withstand voltage between the gate and source is *2. lower than the charger voltage, the FET may be destroyed. If a high resistor is connected to R1, the voltage bet ween the VDD pin and the VSS pin may exceed the absolute *3. maximum rating when a charger is connected in reverse sinc charger to the IC. Insert a e the current flows from the resistor of 100  or higher as R1 for ESD protection. *4. If a capacitor of less than 0.022  F is connected to C1, the DO pin may oscillate when load short-circuiting is detected. Be sure to connect a capacitor of 0.022 F or higher to C1.  *5. If a resistor of 4 k  or higher is connected to R2, the charging curr ent may not be cut when a high-voltage charger is connected. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant. 24

25 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series  Precautions age, and load current should not exceed the package power The application conditions for the input voltage, output volt  dissipation.  Do not apply an electrostatic discharge to this IC that ex ceeds the performance ratings of the built-in electrostatic protection circuit.  ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 25

26 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series Characteristics (Typical Data)  1. Current consumption vs. Ta 1. 2 I vs. Ta 1. 1 I PDN OPE 0.16 6 0.14 5 0.12 4 0.10 A] A]   0.08 [ 3 [ 0.06 OPE 2 PDN I I 0.04 1 0.02 0 0   25 0 40 25 50 7585 40 25 50 75 85  25 0  C] Ta [  C]  Ta [ 1. 3 I vs. V OPE DD 6 5 4 A]  [ 3 OPE 2 I 1 0 8 4 0 2 6 [V] V DD 2. Overcharge detection / release voltage, overdischarge detection / release voltage, overcurrent detection voltage, and delay time 2. 1 V vs. Ta vs. Ta 2. 2 V CL CU 4.350 4.125 4.345 4.115 4.105 4.340 4.335 4.095 4.330 4.085 [V] [V] 4.325 4.075 CL CU 4.320 4.065 V V 4.315 4.055 4.310 4.045 4.035 4.305 4.300 4.025  25 0 25 50 75 85  40 0  25  40 25 50 75 85 C]  Ta [ C]  Ta [ 2. 3 V vs. Ta vs. Ta 2. 4 V DU DL 2.60 2.95 2.58 2.94 2.93 2.56 2.92 2.54 2.52 2.91 [V] 2.50 2.90 [V] DU 2.48 DL 2.89 V V 2.46 2.88 2.44 2.87 2.42 2.86 2.40 2.85 40  25 25 50 75 85  0  40  25 50 75 85 25 0 C]  Ta [ C] Ta [  26

27 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series vs. Ta 2. 6 t vs. Ta 2. 5 t CU DL 1.50 200 1.45 190 1.40 180 1.35 170 1.30 160 [s] 1.25 150 [ms] CU t 1.20 140 DL t 1.15 130 1.10 120 110 1.05 1.00 100  40  25 0 25 50 7585  40  25 0 25 50 7585 Ta [  C] C]  Ta [ 2. 7 V vs. Ta 2. 8 t vs. V DD DIOV DIOV 14 0.175 13 0.170 12 0.165 0.160 11 0.155 10 [V] [ms] 0.150 9 0.145 DIOV 8 DIOV t V 0.140 7 6 0.135 5 0.130 0.125 4  40  25 0 25 50 75 85 3.5 4.0 4.5 3.0 C] Ta [  [V] V DD 2. 9 t vs. Ta 2. 10 V vs. Ta SHORT DIOV 0.75 14 0.70 13 0.65 12 0.60 11 [V] 10 0.55 [ms] 0.50 9 8 0.45 SHORT DIOV t 7 V 0.40 6 0.35 5 0.30 4 0.25  40  25 50 7585 0 25 25 50 75 85 40  25 0  Ta [ C]  Ta [  C] 2. 11 t vs. Ta vs. V 2. 12 t DD SHORT SHORT 0.65 1.0 0.63 0.9 0.61 0.8 0.59 0.7 0.57 0.6 [ms] [ms] 0.55 0.5 0.53 0.4 SHORT SHORT 0.51 t 0.3 t 0.49 0.2 0.47 0.1 0.45 0 0 25 50 7585 40  25  3.0 3.5 4.0 4.5 C]  Ta [ [V] V DD 27

28 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 3. CO pin / DO pin 3. 1 I 3. 2 I vs. V vs. V CO CO COH COL 0 0.5 0.1  0.4 0.2  0.3 [mA] [mA] 0.3  0.2 COL COH I I 0.4  0.1  0.5 0 2 3 4 1 0 2 3 0 1 4 V [V] V [V] CO CO 3. 3 I vs. V 3. 4 I vs. V DOL DOH DO DO 0 0.20  0.05 0.15  0.10  0.15 [mA] 0.10 [mA] DOH 0.20 DOL  I I 0.05  0.25  0.30 0 0 0.5 1.0 1.5 2 3 0 1 4 [V] V V [V] DO DO 28

29 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series Marking Specifications  1. SOT-23-5 Top view (1) to (3): ) Product name vs. Product code Product code (refer to 5 4 (4): Lot number (4) (3) (1) (2) 123 Product name vs. Product code Product Code Product Name (1) (2) (3) R 2 D S-8211DAD-M5T1x S-8211DAE-M5T1x R 2 E S-8211DAH-M5T1x R 2 H S-8211DAI-M5T1x R 2 I S-8211DAJ-M5T1x R 2 J S-8211DAK-M5T1x R 2 K S-8211DAL-M5T1x R 2 L S-8211DAM-M5T1x R 2 M S-8211DAR-M5T1x R 2 R S-8211DAS-M5T1x R 2 S S-8211DAU-M5T1y R 2 U S-8211DAV-M5T1y R 2 V S-8211DAW-M5T1y R 2 W S-8211DBB-M5T1U R 9 B R 9 D S-8211DBD-M5T1U S-8211DBE-M5T1U R 9 E S-8211DBF-M5T1U R 9 F S-8211DBG-M5T1U R 9 G Remark 1. x: G or U y: S or U Please select products of environmental code = U for Sn 100%, halogen-free products. 2. 29

30 BATTERY PROTECTION IC FOR 1-CELL PACK _03 Rev.6.5 S-8211D Series 2. SNT-6A Top view (1) to (3): Product name vs. Product code ) Product code (refer to 5 64 Lot number (4) to (6): (3) (2) (1) (6) (5) (4) 13 2 Product name vs. Product code Product Code Product Name (1) (3) (2) S-8211DAD-I6T1U R 2 D S-8211DAE-I6T1U R 2 E S-8211DAF-I6T1U R 2 F S-8211DAG-I6T1U R 2 G S-8211DAI-I6T1U R 2 I S-8211DAN-I6T1U R 2 N S-8211DAQ-I6T1U R 2 Q S-8211DAT-I6T1U R 2 T S-8211DAX-I6T1U R 2 X S-8211DAY-I6T1U R 2 Y S-8211DAZ-I6T1U R 2 Z S-8211DBA-I6T1U R 9 A S-8211DBC-I6T1U R 9 C 30

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38 Disclaimers (Handling Precautions) (product data, specifications, figures, tables, programs, algorithms and application 1. All the information described herein circuit examples, etc.) is current as of publishing date of this docum ent and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not responsible for damages caused by the reasons other than th e products described herein ent of third-party intellectual property ri ght and any other right due to the use (hereinafter "the products") or infringem of the information described herein. 3. ABLIC Inc. is not responsible for damages ca used by the incorrect information described herein. ranges. Pay special attention to the absolute maximum ratings, 4. Be careful to use the products within their specified operation voltage range and electr ical characteristics, etc. ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the products outside their specified ranges. 5. When using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. n Exchange and Foreign Trade Act and all other export-related 6. When exporting the products, comply with the Foreig laws, and follow the required procedures. 7. The products must not be used or pr ovided (exported) for the purposes of the development of weapons of mass is not responsible for any provision (e xport) to those whose purpose is to destruction or military use. ABLIC Inc. develop, manufacture, use or store nuc lear, biological or chemical weapons, missiles, or other military use. 8. The products are not designed to be us ed as part of any device or equipmen t that may affect the human body, human life, or assets (such as medical equipment, disaster pr evention systems, security systems, combustion control s, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, systems, infrastructure control system aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do pments without prior written permission by ABLIC Inc. not apply the products to the above listed devices and equi Especially, the products cannot be us planted in the human body and devices ed for life support devices, devices im that directly affect human life, etc. Prior consultation with our sales office is required when considering the above uses. ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products. 9. Semiconductor products may fail or malfunction with some probability. therefore take responsibility to give thor ough consideration to safety design including The user of the products should redundancy, fire spread prevention measures, and ma injury or lfunction prevention to prevent accidents causing death , fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system must be sufficiently evaluated and applied on customer's own responsibility. 10. The products are not designed to be radiation-proof. T he necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal us e. However, they contain chemical substances and heavy be put in the mouth. The fr acture surfaces of wafers and chips may be sharp. Be metals and should therefore not careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copy right information and know-how of ABLIC Inc. The information described herein does not convey any lic ense under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a thir d-party without the express permission of ABLIC Inc. is strictly prohibited. 14. For more details on the information de scribed herein, contact our sales office. 2.2-2018.06 www.ablic.com

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